april 2012 ?2012 fairchild semiconductor corporation FDMA7672 rev.c5 www.fairchildsemi.com 1 FDMA7672 single n-ch annel power trench ? mosfet FDMA7672 single n-channel powertrench ? mosfet 30 v, 9 a, 21 m features ? max r ds(on) = 21 m at v gs = 10 v, i d = 9 a ? max r ds(on) = 32 m at v gs = 4.5 v, i d = 7 a ? low profile - 0.8 mm maximum - in the new package microfet 2x2 mm ? free from halogenated compounds and antimony oxides ? rohs compliant general description this device has been designed to provide maximum efficiency and thermal performance for synchronous buck converters. the low r ds(on) and gate charge provide excellent switching performance. application ? dc ? dc buck converters d d s g d d pin 1 drain source microfet 2x2 (bottom view) bottom drain contact d d d d s g mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v dss drain to source voltage 30 v v gss gate to source voltage 20 v i d drain current -continuous t a = 25 c (note 1a) 9 a -pulsed 24 p d power dissipation t a = 25 c (note 1a) 2.4 w power dissipation t a = 25 c (note 1b) 0.9 t j , t stg operating and storage junction temperature range ?55 to +150 c r jc thermal resistance, junction to case 6.9 c/w r ja thermal resistance, junction to ambient (note 1a) 52 r ja thermal resistance, junction to ambient (note 1b) 145 device marking device package reel size tape width quantity 672 FDMA7672 microfet 2x2 7 ?? 12 mm 3000 units
FDMA7672 single n-channel power trench ? mosfet www.fairchildsemi.com 2 ?2012 fairchild semiconductor corporation FDMA7672 rev.c5 notes: 1. r ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r jc is guaranteed by design while r ca is determined by the user's board design. 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diode characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 250 a, v gs = 0 v 30 v bv dss t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c 16 mv/c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v 1 a i gss gate to source leakage current v gs = 20 v, v ds = 0 v 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a 1.0 2.1 3.0 v v gs(th) t j gate to source threshold voltage temperature coefficient i d = 250 a, referenced to 25 c ?6 mv/c r ds(on) static drain to source on resistance v gs = 10 v, i d = 9 a 14 21 m v gs = 4.5 v, i d = 7 a 20 32 v gs = 10 v, i d = 9 a, t j = 125 c 19 28 g fs forward transconductance v ds = 5 v, i d = 9 a 35 s c iss input capacitance v ds = 15 v, v gs = 0 v f = 1.0 mhz 570 760 pf c oss output capacitance 195 260 pf c rss reverse transfer capacitance 25 40 pf r g gate resistance 1.5 t d(on) turn-on delay time v dd = 15 v, i d = 9 a v gs = 10 v, r gen = 6 612ns t r rise time 210ns t d(off) turn-off delay time 14 25 ns t f fall time 210ns q g total gate charge v gs = 0 v to 10 v v dd = 15 v, i d = 9 a 9.3 13 nc q g total gate charge v gs = 0 v to 4.5 v 4.4 6 nc q gs gate to source gate charge 1.9 nc q gd gate to drain ?miller? charge 1.5 nc i s maximum continuous drain-source diode forward current 2 a v sd source to drain diode forward voltage v gs = 0 v, i s = 2 a (note 2) 0.8 1.2 v t rr reverse recovery time i f = 9 a, di/dt = 100 a/ s 18 32 ns q rr reverse recovery charge 5 10 nc a. 52 c/w when mounted on a 1 in 2 pad of 2 oz copper. b. 145 c/w when mounted on a minimum pad of 2 oz copper.
FDMA7672 single n-channel power trench ? mosfet www.fairchildsemi.com 3 ?2012 fairchild semiconductor corporation FDMA7672 rev.c5 typical characteristics t j = 25c unless otherwise noted figure 1. 0 0.5 1.0 1.5 2.0 0 4 8 12 16 20 24 v gs = 3.5 v v gs = 4.5 v pulse duration = 80 p s duty cycle = 0.5% max v gs = 6 v v gs = 4 v v gs = 10 v i d , drain current (a) v ds , drain to source voltage (v) on-region characteristics figure 2. 0 4 8 12162024 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v gs = 4.5 v pulse duration = 80 p s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 10 v v gs = 6 v v gs = 4 v v gs = 3.5 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 i d = 9 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 24681 0 0 20 40 60 80 i d = 9 a t j = 25 o c t j = 125 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 4 8 12 16 20 24 v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 25 o c t j = 125 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.20.40.60.81.01.2 0.01 0.1 10 24 t j = -55 o c t j = 25 o c t j = 125 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDMA7672 single n-channel power trench ? mosfet www.fairchildsemi.com 4 ?2012 fairchild semiconductor corporation FDMA7672 rev.c5 figure 7. 0246810 0 2 4 6 8 10 q g , gate charge (nc) v gs , gate to source voltage (v) i d = 9 a v dd = 20 v v dd = 10 v v dd = 15 v gate charge characteristics figure 8. 0.1 1 10 30 10 100 1000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.01 0.1 1 10 100 0.01 0.1 1 10 100 1 s 0.1 ms 10 ms dc 10 s 100 ms 1 ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 145 o c/w t a = 25 o c f o r w a r d b i a s s a f e operating area figure 10. 10 -4 10 -3 10 -2 10 -1 10 0 10 1 100 1000 0.1 1 10 100 1000 single pulse r t ja = 145 o c/w t a = 25 o c p ( pk ) , peak transient power (w) t, pulse width (sec) s i n g l e p u l s e m a x i m u m p o w e r d i s s i p a t i o n figure 11. 10 -4 10 -3 10 -2 10 -1 11 0 100 1000 0.001 0.01 0.1 1 single pulse r t ja = 145 o c/w duty cycle-descending order normalized thermal impedance, z t jc t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a transient thermal response curve typical characteristics t j = 25c unless otherwise noted
FDMA7672 single n-channel power trench ? mosfet www.fairchildsemi.com 5 ?2012 fairchild semiconductor corporation FDMA7672 rev.c5 dimensional outline and pad layout b. dimensions are in millimeters. c. dimensions and tolerances per a. does not fully conform to jedec registration asme y14.5m, 1994 0.10 cab 0.05 c recommended land pattern opt 1 0.10 c 0.08 c c 2.000 2.000 0.05 0.00 0.10 c 2x 2x 0.8 max seating plane 0.10 c (0.20) 0.33 0.20 1 3 4 6 4 6 3 1 pin #1 ident 0.65 1.30 1.35 (0.47) 1.05 0.40 typ 0.65 typ 0.25~0.35 1.000 0.800 2.30 1.00 mo-229 dated aug/2003 (0.56) (0.30) 0.66 recommended land pattern opt 2 4 6 3 1 1.35 (0.47) 1.05 0.40 typ 0.65 typ 2.30 1.00 0.66 no drain or gate traces allowed in this area pin#1 location 1.05 0.95 d. drawing filename: mkt-mlp06lrev2.
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